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<a name="Vector-Extensions"></a>
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<h3 class="section">5.42 Using vector instructions through built-in functions</h3>
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<p>On some targets, the instruction set contains SIMD vector instructions that
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operate on multiple values contained in one large register at the same time.
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For example, on the i386 the MMX, 3Dnow! and SSE extensions can be used
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</p><p>The first step in using these extensions is to provide the necessary data
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types. This should be done using an appropriate <code>typedef</code>:
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</p><pre class="smallexample"> typedef int v4si __attribute__ ((vector_size (16)));
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<p>The <code>int</code> type specifies the base type, while the attribute specifies
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the vector size for the variable, measured in bytes. For example, the
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declaration above causes the compiler to set the mode for the <code>v4si</code>
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type to be 16 bytes wide and divided into <code>int</code> sized units. For
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a 32-bit <code>int</code> this means a vector of 4 units of 4 bytes, and the
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corresponding mode of <code>foo</code> will be <acronym>V4SI</acronym>.
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</p><p>The <code>vector_size</code> attribute is only applicable to integral and
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float scalars, although arrays, pointers, and function return values
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are allowed in conjunction with this construct.
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</p><p>All the basic integer types can be used as base types, both as signed
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and as unsigned: <code>char</code>, <code>short</code>, <code>int</code>, <code>long</code>,
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<code>long long</code>. In addition, <code>float</code> and <code>double</code> can be
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used to build floating-point vector types.
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</p><p>Specifying a combination that is not valid for the current architecture
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will cause GCC to synthesize the instructions using a narrower mode.
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For example, if you specify a variable of type <code>V4SI</code> and your
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architecture does not allow for this specific SIMD type, GCC will
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produce code that uses 4 <code>SIs</code>.
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</p><p>The types defined in this manner can be used with a subset of normal C
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operations. Currently, GCC will allow using the following operators
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on these types: <code>+, -, *, /, unary minus, ^, |, &, ~</code>.
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</p><p>The operations behave like C++ <code>valarrays</code>. Addition is defined as
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the addition of the corresponding elements of the operands. For
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example, in the code below, each of the 4 elements in <var>a</var> will be
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added to the corresponding 4 elements in <var>b</var> and the resulting
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vector will be stored in <var>c</var>.
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</p><pre class="smallexample"> typedef int v4si __attribute__ ((vector_size (16)));
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<p>Subtraction, multiplication, division, and the logical operations
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operate in a similar manner. Likewise, the result of using the unary
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minus or complement operators on a vector type is a vector whose
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elements are the negative or complemented values of the corresponding
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elements in the operand.
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</p><p>You can declare variables and use them in function calls and returns, as
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well as in assignments and some casts. You can specify a vector type as
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a return type for a function. Vector types can also be used as function
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arguments. It is possible to cast from one vector type to another,
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provided they are of the same size (in fact, you can also cast vectors
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to and from other datatypes of the same size).
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</p><p>You cannot operate between vectors of different lengths or different
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signedness without a cast.
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</p><p>A port that supports hardware vector operations, usually provides a set
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of built-in functions that can be used to operate on vectors. For
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example, a function to add two vectors and multiply the result by a
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third could look like this:
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</p><pre class="smallexample"> v4si f (v4si a, v4si b, v4si c)
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v4si tmp = __builtin_addv4si (a, b);
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return __builtin_mulv4si (tmp, c);
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