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authorSuren A. Chilingaryan <csa@suren.me>2015-05-13 04:50:26 +0200
committerSuren A. Chilingaryan <csa@suren.me>2015-05-13 04:50:26 +0200
commitc3284d622762eb008bc52d0c2c6e4953fe0bebe5 (patch)
tree5786039853be25f9ac4b390c0ce6783309b2bb20
parent9c49ca07021cea3f923b39d70b3580970963d0ec (diff)
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Support streaming mode DMAHEADmaster
-rw-r--r--CMakeLists.txt2
-rw-r--r--ipedma_test.c28
2 files changed, 27 insertions, 3 deletions
diff --git a/CMakeLists.txt b/CMakeLists.txt
index eb1b766..4721538 100644
--- a/CMakeLists.txt
+++ b/CMakeLists.txt
@@ -14,6 +14,8 @@ link_directories(
${PCILIB_LIBRARY_DIRS}
)
+add_definitions("-fPIC --std=c99 -O2 -gdwarf-2 -g3")
+
add_executable(ipedma_test ipedma_test.c)
target_link_libraries(ipedma_test ${PCILIB_LIBRARIES})
set_target_properties(ipedma_test PROPERTIES COMPILE_FLAGS -Wno-array-bounds)
diff --git a/ipedma_test.c b/ipedma_test.c
index a99a40b..d072a5c 100644
--- a/ipedma_test.c
+++ b/ipedma_test.c
@@ -15,6 +15,7 @@
#include <pcilib.h>
#include <pcilib/kmem.h>
+#include <pcilib/bar.h>
//#include <sys/ipc.h>
//#include <sys/shm.h>
@@ -29,14 +30,16 @@
#define BUFFERS 128
#define ITERATIONS 1000
-#define DESC_THRESHOLD BUFFERS/8 // Lorenzo: after how many desc the FPGA must update the "written descriptor counter" in PC mem
+#define DESC_THRESHOLD 1//BUFFERS/8 // Lorenzo: after how many desc the FPGA must update the "written descriptor counter" in PC mem
// if set to 0, the update only happens when INT is received
#define HUGE_PAGE 1 // number of pages per huge page
-#define TLP_SIZE 32 // TLP SIZE = 64 for 256B payload, 32 for 128B payload
+#define TLP_SIZE 64 // TLP SIZE = 64 for 256B payload, 32 for 128B payload
#define PAGE_SIZE 4096 // other values are not supported in the kernel
#define USE_64 // Lorenzo: use 64bit addressing
+#define USE_STREAMING // Use alternative implementation with streaming sequence of memory pages
+#define ENABLE_COUNTER 0x9000 // If set wee need to write 1 to the specified register to enable counter
//#define DUAL_CORE // Lorenzo: DUAL Core
@@ -405,8 +408,16 @@ int main() {
printf("* DMA: Start \n");
WR(0x04, 0x1);
+
+#ifdef ENABLE_COUNTER
+ printf("* Enable counter\n");
+ WR(ENABLE_COUNTER, 0x1);
+#endif /* ENABLE_COUNTER */
+
gettimeofday(&start, NULL);
+
+
// ******************************************************************
// **** Handshaking DMA *****
// ******************************************************************
@@ -438,7 +449,7 @@ int main() {
hwptr = desc[4];
#endif
j++;
- //printf("\rcurptr: %lx \t \t hwptr: %lx", curptr, hwptr);
+ //printf("curptr: %lx \t \t hwptr: %lx\n", curptr, hwptr);
} while (hwptr == curptr);
do {
@@ -446,6 +457,12 @@ int main() {
#ifdef MEM_COPY
memcpy(temp_data[i][curbuf], (void*)ptr[curbuf], 4096);
#endif
+
+#ifdef USE_STREAMING
+ WR(0x50, bus_addr[curbuf]);
+ // Now, we can check error in the register 0x68 (non-zero if there is an error)
+#endif /* USE_STREAMING */
+
#ifdef CHECK_RESULTS
for (k = 0; k < 1024 ; k++)
{
@@ -501,7 +518,12 @@ for (k = 0; k < 1024 ; k++)
}
#endif
+#ifndef USE_STREAMING
+ // Generally it is safe to write register in any case, it is just unsed in streaming mode
+ // Therefore, in the driver we can use it instead of software register so far
WR(0x58, curbuf + 1);
+#endif /* ! USE_STREAMING */
+
//printf("WR %d\n", curbuf + 1);
//printf("%u (%lu)\n", curbuf, j);
curptr = hwptr;