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authorSuren A. Chilingaryan <csa@suren.me>2015-04-27 01:54:44 +0200
committerSuren A. Chilingaryan <csa@suren.me>2015-04-27 01:54:44 +0200
commit8d3ad26d8331c43659d0d4e77e8a50fbc3cfc1e4 (patch)
tree30c74c76115279cdc15437a07fabd8347ac1fdfd /dma
parentdcd8ad63316eac672492bc18112bbbb52811c3fc (diff)
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Further adjustments to get ready for independent event plugins
Diffstat (limited to 'dma')
-rw-r--r--dma/ipe.h4
-rw-r--r--dma/nwl.h4
-rw-r--r--dma/nwl_engine.c6
-rw-r--r--dma/nwl_private.h2
4 files changed, 9 insertions, 7 deletions
diff --git a/dma/ipe.h b/dma/ipe.h
index c647954..aa42f40 100644
--- a/dma/ipe.h
+++ b/dma/ipe.h
@@ -17,7 +17,7 @@ int dma_ipe_stop(pcilib_dma_context_t *ctx, pcilib_dma_engine_t dma, pcilib_dma_
int dma_ipe_stream_read(pcilib_dma_context_t *vctx, pcilib_dma_engine_t dma, uintptr_t addr, size_t size, pcilib_dma_flags_t flags, pcilib_timeout_t timeout, pcilib_dma_callback_t cb, void *cbattr);
double dma_ipe_benchmark(pcilib_dma_context_t *vctx, pcilib_dma_engine_addr_t dma, uintptr_t addr, size_t size, size_t iterations, pcilib_dma_direction_t direction);
-#ifdef _PCILIB_CONFIG_C
+#ifdef _PCILIB_EXPORT_C
static const pcilib_dma_api_description_t ipe_dma_api = {
dma_ipe_init,
dma_ipe_free,
@@ -79,7 +79,7 @@ static const pcilib_register_description_t ipe_dma_registers[] = {
{0x0060, 0, 32, 0, 0x00000000, PCILIB_REGISTER_RW , PCILIB_REGISTER_STANDARD, PCILIB_REGISTER_BANK_DMA, "update_thresh", "Update threshold of progress register"},
{0, 0, 0, 0, 0x00000000, 0, 0, 0, NULL, NULL}
};
-#endif /* _PCILIB_CONFIG_C */
+#endif /* _PCILIB_EXPORT_C */
#endif /* _PCILIB_DMA_IPE_H */
diff --git a/dma/nwl.h b/dma/nwl.h
index 3d6e988..fceef4d 100644
--- a/dma/nwl.h
+++ b/dma/nwl.h
@@ -20,7 +20,7 @@ int dma_nwl_write_fragment(pcilib_dma_context_t *vctx, pcilib_dma_engine_t dma,
int dma_nwl_stream_read(pcilib_dma_context_t *vctx, pcilib_dma_engine_t dma, uintptr_t addr, size_t size, pcilib_dma_flags_t flags, pcilib_timeout_t timeout, pcilib_dma_callback_t cb, void *cbattr);
double dma_nwl_benchmark(pcilib_dma_context_t *vctx, pcilib_dma_engine_addr_t dma, uintptr_t addr, size_t size, size_t iterations, pcilib_dma_direction_t direction);
-#ifdef _PCILIB_CONFIG_C
+#ifdef _PCILIB_EXPORT_C
static const pcilib_dma_api_description_t nwl_dma_api = {
dma_nwl_init,
dma_nwl_free,
@@ -75,7 +75,7 @@ static pcilib_register_description_t nwl_dma_registers[] = {
{0, 0, 0, 0, 0x00000000, 0, 0, 0, NULL, NULL}
};
-#endif /* _PCILIB_CONFIG_C */
+#endif /* _PCILIB_EXPORT_C */
#ifdef _PCILIB_DMA_NWL_C
// DMA Engine Registers
diff --git a/dma/nwl_engine.c b/dma/nwl_engine.c
index a437948..6930533 100644
--- a/dma/nwl_engine.c
+++ b/dma/nwl_engine.c
@@ -93,7 +93,7 @@ int dma_nwl_start_engine(nwl_dma_t *ctx, pcilib_dma_engine_t dma) {
do {
nwl_read_register(val, ctx, base, REG_DMA_ENG_CTRL_STATUS);
gettimeofday(&cur, NULL);
- } while ((val & (DMA_ENG_STATE_MASK|DMA_ENG_USER_RESET))&&(((cur.tv_sec - start.tv_sec)*1000000 + (cur.tv_usec - start.tv_usec)) < PCILIB_REGISTER_TIMEOUT));
+ } while ((val & (DMA_ENG_STATE_MASK|DMA_ENG_USER_RESET))&&(((cur.tv_sec - start.tv_sec)*1000000 + (cur.tv_usec - start.tv_usec)) < PCILIB_NWL_REGISTER_TIMEOUT));
if (val & (DMA_ENG_STATE_MASK|DMA_ENG_USER_RESET)) {
pcilib_error("Timeout during reset of DMA engine %i", ectx->desc->addr);
@@ -110,7 +110,7 @@ int dma_nwl_start_engine(nwl_dma_t *ctx, pcilib_dma_engine_t dma) {
do {
nwl_read_register(val, ctx, base, REG_DMA_ENG_CTRL_STATUS);
gettimeofday(&cur, NULL);
- } while ((val & DMA_ENG_RESET)&&(((cur.tv_sec - start.tv_sec)*1000000 + (cur.tv_usec - start.tv_usec)) < PCILIB_REGISTER_TIMEOUT));
+ } while ((val & DMA_ENG_RESET)&&(((cur.tv_sec - start.tv_sec)*1000000 + (cur.tv_usec - start.tv_usec)) < PCILIB_NWL_REGISTER_TIMEOUT));
if (val & DMA_ENG_RESET) {
pcilib_error("Timeout during reset of DMA engine %i", ectx->desc->addr);
@@ -183,7 +183,7 @@ int dma_nwl_stop_engine(nwl_dma_t *ctx, pcilib_dma_engine_t dma) {
do {
nwl_read_register(val, ctx, base, REG_DMA_ENG_CTRL_STATUS);
gettimeofday(&cur, NULL);
- } while ((val & (DMA_ENG_RUNNING))&&(((cur.tv_sec - start.tv_sec)*1000000 + (cur.tv_usec - start.tv_usec)) < PCILIB_REGISTER_TIMEOUT));
+ } while ((val & (DMA_ENG_RUNNING))&&(((cur.tv_sec - start.tv_sec)*1000000 + (cur.tv_usec - start.tv_usec)) < PCILIB_NWL_REGISTER_TIMEOUT));
if (ectx->ring) {
ring_pa = pcilib_kmem_get_pa(ctx->dmactx.pcilib, ectx->ring);
diff --git a/dma/nwl_private.h b/dma/nwl_private.h
index 934fa04..1d60169 100644
--- a/dma/nwl_private.h
+++ b/dma/nwl_private.h
@@ -15,6 +15,8 @@ typedef struct pcilib_nwl_engine_context_s pcilib_nwl_engine_context_t;
#define PCILIB_NWL_DMA_DESCRIPTOR_SIZE 64 // in bytes
#define PCILIB_NWL_DMA_PAGES 256 // 1024
+#define PCILIB_NWL_REGISTER_TIMEOUT 10000 /**< us */
+
//#define DEBUG_HARDWARE
//#define DEBUG_NWL