diff options
Diffstat (limited to 'dma.h')
| -rw-r--r-- | dma.h | 71 |
1 files changed, 71 insertions, 0 deletions
@@ -0,0 +1,71 @@ +#ifndef _PCIDEV_DMA_H +#define _PCIDEV_DMA_H + +#include <stdio.h> +#include <pcilib.h> +#include <pcilib/version.h> +#include <pcilib/dma.h> + +#include "version.h" + +#define PCIDEV_PAGE_SIZE 4096l /**< page size */ +#define PCIDEV_DMA_PAGES 512l /**< number of DMA pages in the ring buffer to allocate */ +#define PCIDEV_DMA_TIMEOUT 100000l /**< us, overrides PCILIB_DMA_TIMEOUT (actual hardware timeout is 50ms according to Lorenzo) */ + +pcilib_dma_context_t *pcidev_dma_init(pcilib_t *ctx, const char *model, const void *arg); +void pcidev_dma_free(pcilib_dma_context_t *vctx); + +int pcidev_dma_get_status(pcilib_dma_context_t *vctx, pcilib_dma_engine_t dma, pcilib_dma_engine_status_t *status, size_t n_buffers, pcilib_dma_buffer_status_t *buffers); + +int pcidev_dma_start(pcilib_dma_context_t *ctx, pcilib_dma_engine_t dma, pcilib_dma_flags_t flags); +int pcidev_dma_stop(pcilib_dma_context_t *ctx, pcilib_dma_engine_t dma, pcilib_dma_flags_t flags); + +int pcidev_dma_stream_read(pcilib_dma_context_t *vctx, pcilib_dma_engine_t dma, uintptr_t addr, size_t size, pcilib_dma_flags_t flags, pcilib_timeout_t timeout, pcilib_dma_callback_t cb, void *cbattr); +double pcidev_dma_benchmark(pcilib_dma_context_t *vctx, pcilib_dma_engine_addr_t dma, uintptr_t addr, size_t size, size_t iterations, pcilib_dma_direction_t direction); + +# ifdef _PCIDEV_MODEL_C +static const pcilib_dma_api_description_t pcidev_dma_api = { + PCILIB_VERSION, + pcidev_dma_init, + pcidev_dma_free, + pcidev_dma_get_status, + NULL, + NULL, + NULL, + pcidev_dma_start, + pcidev_dma_stop, + NULL, + pcidev_dma_stream_read, + NULL +}; + +static const pcilib_dma_engine_description_t pcidev_dma_engines[] = { + { 0, PCILIB_DMA_TYPE_PACKET, PCILIB_DMA_FROM_DEVICE, 32, "dma", NULL }, + { 0 } +}; + +static const pcilib_register_bank_description_t pcidev_dma_banks[] = { + { PCILIB_REGISTER_BANK_DMACONF, PCILIB_REGISTER_PROTOCOL_SOFTWARE, PCILIB_BAR_NOBAR, 0, 0, 32, 0x1000, PCILIB_HOST_ENDIAN, PCILIB_HOST_ENDIAN, "0x%lx", "dmaconf", "DMA Configuration"}, + { 0, 0, 0, 0, 0, 0, 0, 0, 0, NULL, NULL, NULL } +}; + +static const pcilib_register_description_t pcidev_dma_registers[] = { + {0x0000, 0, 32, PCILIB_VERSION, 0x00000000, PCILIB_REGISTER_R , PCILIB_REGISTER_STANDARD, PCILIB_REGISTER_BANK_DMACONF, "dma_version", "Version of DMA engine"}, + {0x0004, 0, 32, PCIDEV_DMA_TIMEOUT, 0x00000000, PCILIB_REGISTER_RW , PCILIB_REGISTER_STANDARD, PCILIB_REGISTER_BANK_DMACONF, "dma_timeout", "Default DMA timeout"}, + {0x0008, 0, 32, PCIDEV_DMA_PAGES, 0x00000000, PCILIB_REGISTER_RW , PCILIB_REGISTER_STANDARD, PCILIB_REGISTER_BANK_DMACONF, "dma_pages", "Number of buffers in DMA page ring"}, + {0x000C, 0, 32, PCIDEV_PAGE_SIZE, 0x00000000, PCILIB_REGISTER_RW , PCILIB_REGISTER_STANDARD, PCILIB_REGISTER_BANK_DMACONF, "dma_page_size", "Size of a page in DMA page ring (multiple of 4K)"}, + {0x0010, 0, 32, 0, 0x00000000, PCILIB_REGISTER_RW , PCILIB_REGISTER_STANDARD, PCILIB_REGISTER_BANK_DMACONF, "dma_region_low", "Low bits of static DMA I/O region"}, + {0x0014, 0, 32, 0, 0x00000000, PCILIB_REGISTER_RW , PCILIB_REGISTER_STANDARD, PCILIB_REGISTER_BANK_DMACONF, "dma_region_hi", "High bits of static DMA I/O region"}, + {0x0020, 0, 32, 0, 0xFFFFFFFF, PCILIB_REGISTER_RW , PCILIB_REGISTER_STANDARD, PCILIB_REGISTER_BANK_DMACONF, "dma_flags", "DMA Control Register"}, + {0x0020, 0, 1, 0, 0xFFFFFFFF, PCILIB_REGISTER_RW , PCILIB_REGISTER_BITS, PCILIB_REGISTER_BANK_DMACONF, "dma_nosync", "Do not synchronize DMA pages"}, + {0x0020, 1, 1, 0, 0xFFFFFFFF, PCILIB_REGISTER_RW , PCILIB_REGISTER_BITS, PCILIB_REGISTER_BANK_DMACONF, "dma_nosleep", "Do not sleep while there is no data"}, + {0, 0, 0, 0, 0x00000000, 0, 0, 0, NULL, NULL} +}; + +static const pcilib_dma_description_t pcidev_dma = + { &pcidev_dma_api, pcidev_dma_banks, pcidev_dma_registers, pcidev_dma_engines, NULL, NULL, "pcidev", "Dummy DMA sample" }; + +# endif /* _PCIDEV_MODEL_C */ + + +#endif /* _PCIDEV_DMA_H */ |