bzr branch
http://darksoft.org/webbzr/alps/pcitool
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330
by Suren A. Chilingaryan
Support for 64-bit registes |
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#define _POSIX_C_SOURCE 200112L
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#define _GNU_SOURCE
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#include <stdio.h> |
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#include <string.h> |
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#include <stdint.h> |
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#include <unistd.h> |
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#include <stdint.h> |
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#include <assert.h> |
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#include <ctype.h> |
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#include <time.h> |
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#include <sched.h> |
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#include <arpa/inet.h> |
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#include <sys/time.h> |
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#include "pci.h" |
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#include "tools.h" |
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#include "error.h" |
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static void pcilib_run_cpuid(uint32_t eax, uint32_t ecx, uint32_t* abcd) { |
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uint32_t ebx = 0, edx; |
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# if defined( __i386__ ) && defined ( __PIC__ )
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/* in case of PIC under 32-bit EBX cannot be clobbered */
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__asm__ ( "movl %%ebx, %%edi \n\t cpuid \n\t xchgl %%ebx, %%edi" : "=D" (ebx), |
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# else
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__asm__ ( "cpuid" : "+b" (ebx), |
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# endif
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"+a" (eax), "+c" (ecx), "=d" (edx) ); |
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abcd[0] = eax; abcd[1] = ebx; abcd[2] = ecx; abcd[3] = edx; |
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}
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static int pcilib_check_xcr0_ymm() { |
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uint32_t xcr0; |
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__asm__ ("xgetbv" : "=a" (xcr0) : "c" (0) : "%edx" ); |
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return ((xcr0 & 6) == 6); /* checking if xmm and ymm state are enabled in XCR0 */ |
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}
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static int pcilib_check_4th_gen_intel_core_features() { |
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uint32_t abcd[4]; |
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uint32_t fma_movbe_osxsave_mask = ((1 << 12) | (1 << 22) | (1 << 27)); |
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uint32_t avx2_bmi12_mask = (1 << 5) | (1 << 3) | (1 << 8); |
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/* CPUID.(EAX=01H, ECX=0H):ECX.FMA[bit 12]==1 &&
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CPUID.(EAX=01H, ECX=0H):ECX.MOVBE[bit 22]==1 &&
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CPUID.(EAX=01H, ECX=0H):ECX.OSXSAVE[bit 27]==1 */
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pcilib_run_cpuid( 1, 0, abcd ); |
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if ( (abcd[2] & fma_movbe_osxsave_mask) != fma_movbe_osxsave_mask ) |
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return 0; |
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if ( ! pcilib_check_xcr0_ymm() ) |
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return 0; |
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/* CPUID.(EAX=07H, ECX=0H):EBX.AVX2[bit 5]==1 &&
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CPUID.(EAX=07H, ECX=0H):EBX.BMI1[bit 3]==1 &&
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CPUID.(EAX=07H, ECX=0H):EBX.BMI2[bit 8]==1 */
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pcilib_run_cpuid( 7, 0, abcd ); |
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if ( (abcd[1] & avx2_bmi12_mask) != avx2_bmi12_mask ) |
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return 0; |
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/* CPUID.(EAX=80000001H):ECX.LZCNT[bit 5]==1 */
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pcilib_run_cpuid( 0x80000001, 0, abcd ); |
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if ( (abcd[2] & (1 << 5)) == 0) |
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return 0; |
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return 1; |
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}
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static int pcilib_detect_cpu_gen() { |
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if (pcilib_check_4th_gen_intel_core_features()) |
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return 4; |
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return 0; |
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}
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int pcilib_get_cpu_gen() { |
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int gen = -1; |
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if (gen < 0 ) |
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gen = pcilib_detect_cpu_gen(); |
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return gen; |
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}
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int pcilib_get_page_mask() { |
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int pagesize,pagemask,temp; |
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pagesize = sysconf(_SC_PAGESIZE); |
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for( pagemask=0, temp = pagesize; temp != 1; ) { |
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temp = (temp >> 1); |
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pagemask = (pagemask << 1)+1; |
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}
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return pagemask; |
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}
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int pcilib_get_cpu_count() { |
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int err; |
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int cpu_count; |
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cpu_set_t mask; |
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err = sched_getaffinity(getpid(), sizeof(mask), &mask); |
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if (err) return 1; |
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#ifdef CPU_COUNT
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cpu_count = CPU_COUNT(&mask); |
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#else
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for (cpu_count = 0; cpu_count < CPU_SETSIZE; cpu_count++) { |
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if (!CPU_ISSET(cpu_count, &mask)) break; |
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}
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#endif
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if (!cpu_count) cpu_count = PCILIB_DEFAULT_CPU_COUNT; |
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return cpu_count; |
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}
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