/alps/pcitool : contents of dma/nwl

: (revision 412)

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55 by Suren A. Chilingaryan IRQ support in NWL DMA engine	1	#include <stdio.h>
	2	#include <stdlib.h>
	3	#include <string.h>
	4	#include <unistd.h>
	5	#include <sys/time.h>
	6
	7	#include "pcilib.h"
	8
	9	#include "pci.h"
	10	#include "error.h"
	11	#include "tools.h"
	12
227 by Suren A. Chilingaryan Initial implementation of IPEDMA, dummy driver for KAPTURE, start of API changes	13	#include "nwl_private.h"
55 by Suren A. Chilingaryan IRQ support in NWL DMA engine	14	#include "nwl_defines.h"
55 by Suren A. Chilingaryan IRQ support in NWL DMA engine	15
63 by Suren A. Chilingaryan Provide IRQ enable/disable call	16	int dma_nwl_init_irq(nwl_dma_t *ctx, uint32_t val) {
	17	if (val&(DMA_INT_ENABLE\|DMA_USER_INT_ENABLE)) {
	18	if (val&DMA_INT_ENABLE) ctx->irq_preserve \|= PCILIB_DMA_IRQ;
	19	if (val&DMA_USER_INT_ENABLE) ctx->irq_preserve \|= PCILIB_EVENT_IRQ;
	20	}
	21
65 by Suren A. Chilingaryan Separate NWL loopback code, provide DMA start/stop interfaces	22	ctx->irq_started = 1;
63 by Suren A. Chilingaryan Provide IRQ enable/disable call	23	return 0;
	24	}
	25
	26	int dma_nwl_free_irq(nwl_dma_t *ctx) {
65 by Suren A. Chilingaryan Separate NWL loopback code, provide DMA start/stop interfaces	27	if (ctx->irq_started) {
63 by Suren A. Chilingaryan Provide IRQ enable/disable call	28	dma_nwl_disable_irq((pcilib_dma_context_t*)ctx, 0);
	29	if (ctx->irq_preserve) dma_nwl_enable_irq((pcilib_dma_context_t*)ctx, ctx->irq_preserve, 0);
	30	ctx->irq_enabled = 0;
65 by Suren A. Chilingaryan Separate NWL loopback code, provide DMA start/stop interfaces	31	ctx->irq_started = 0;
63 by Suren A. Chilingaryan Provide IRQ enable/disable call	32	}
	33	return 0;
	34	}
	35
	36	int dma_nwl_enable_irq(pcilib_dma_context_t *vctx, pcilib_irq_type_t type, pcilib_dma_flags_t flags) {
55 by Suren A. Chilingaryan IRQ support in NWL DMA engine	37	uint32_t val;
63 by Suren A. Chilingaryan Provide IRQ enable/disable call	38	nwl_dma_t ctx = (nwl_dma_t)vctx;
55 by Suren A. Chilingaryan IRQ support in NWL DMA engine	39
74 by Suren A. Chilingaryan Implement DMA access synchronization for NWL implementation	40	if (flags&PCILIB_DMA_FLAG_PERSISTENT) ctx->irq_preserve \|= type;
63 by Suren A. Chilingaryan Provide IRQ enable/disable call	41
65 by Suren A. Chilingaryan Separate NWL loopback code, provide DMA start/stop interfaces	42	if ((ctx->irq_enabled&type) == type) return 0;
63 by Suren A. Chilingaryan Provide IRQ enable/disable call	43
	44	type \|= ctx->irq_enabled;
	45
	46	nwl_read_register(val, ctx, ctx->base_addr, REG_DMA_CTRL_STATUS);
65 by Suren A. Chilingaryan Separate NWL loopback code, provide DMA start/stop interfaces	47	if (!ctx->irq_started) dma_nwl_init_irq(ctx, val);
55 by Suren A. Chilingaryan IRQ support in NWL DMA engine	48
	49	val &= ~(DMA_INT_ENABLE\|DMA_USER_INT_ENABLE);
	50	nwl_write_register(val, ctx, ctx->base_addr, REG_DMA_CTRL_STATUS);
	51
236 by Suren A. Chilingaryan Big redign of model structures	52	pcilib_clear_irq(ctx->dmactx.pcilib, NWL_DMA_IRQ_SOURCE);
55 by Suren A. Chilingaryan IRQ support in NWL DMA engine	53
	54	if (type & PCILIB_DMA_IRQ) val \|= DMA_INT_ENABLE;
	55	if (type & PCILIB_EVENT_IRQ) val \|= DMA_USER_INT_ENABLE;
	56	nwl_write_register(val, ctx, ctx->base_addr, REG_DMA_CTRL_STATUS);
	57
	58	ctx->irq_enabled = type;
	59
	60	return 0;
	61	}
	62
63 by Suren A. Chilingaryan Provide IRQ enable/disable call	63
63 by Suren A. Chilingaryan Provide IRQ enable/disable call	64	int dma_nwl_disable_irq(pcilib_dma_context_t *vctx, pcilib_dma_flags_t flags) {
55 by Suren A. Chilingaryan IRQ support in NWL DMA engine	65	uint32_t val;
63 by Suren A. Chilingaryan Provide IRQ enable/disable call	66	nwl_dma_t ctx = (nwl_dma_t)vctx;
55 by Suren A. Chilingaryan IRQ support in NWL DMA engine	67
	68	ctx->irq_enabled = 0;
	69
	70	nwl_read_register(val, ctx, ctx->base_addr, REG_DMA_CTRL_STATUS);
65 by Suren A. Chilingaryan Separate NWL loopback code, provide DMA start/stop interfaces	71	if (!ctx->irq_started) dma_nwl_init_irq(ctx, val);
55 by Suren A. Chilingaryan IRQ support in NWL DMA engine	72	val &= ~(DMA_INT_ENABLE\|DMA_USER_INT_ENABLE);
	73	nwl_write_register(val, ctx, ctx->base_addr, REG_DMA_CTRL_STATUS);
	74
74 by Suren A. Chilingaryan Implement DMA access synchronization for NWL implementation	75	if (flags&PCILIB_DMA_FLAG_PERSISTENT) ctx->irq_preserve = 0;
63 by Suren A. Chilingaryan Provide IRQ enable/disable call	76
55 by Suren A. Chilingaryan IRQ support in NWL DMA engine	77	return 0;
	78	}
	79
63 by Suren A. Chilingaryan Provide IRQ enable/disable call	80
55 by Suren A. Chilingaryan IRQ support in NWL DMA engine	81	int dma_nwl_enable_engine_irq(nwl_dma_t *ctx, pcilib_dma_engine_t dma) {
	82	uint32_t val;
	83
109 by Suren A. Chilingaryan Improvements of DMA engine	84	dma_nwl_enable_irq((pcilib_dma_context_t*)ctx, PCILIB_DMA_IRQ, 0);
55 by Suren A. Chilingaryan IRQ support in NWL DMA engine	85
	86	nwl_read_register(val, ctx, ctx->engines[dma].base_addr, REG_DMA_ENG_CTRL_STATUS);
	87	val \|= (DMA_ENG_INT_ENABLE);
	88	nwl_write_register(val, ctx, ctx->engines[dma].base_addr, REG_DMA_ENG_CTRL_STATUS);
	89
	90	return 0;
	91	}
	92
	93	int dma_nwl_disable_engine_irq(nwl_dma_t *ctx, pcilib_dma_engine_t dma) {
	94	uint32_t val;
	95
	96	nwl_read_register(val, ctx, ctx->engines[dma].base_addr, REG_DMA_ENG_CTRL_STATUS);
	97	val &= ~(DMA_ENG_INT_ENABLE);
	98	nwl_write_register(val, ctx, ctx->engines[dma].base_addr, REG_DMA_ENG_CTRL_STATUS);
	99
	100	return 0;
	101	}
59 by Suren A. Chilingaryan Reorganization of NWL engine, step 1	102
88 by Suren A. Chilingaryan IRQ acknowledgement support in the engine API	103	int dma_nwl_acknowledge_irq(pcilib_dma_context_t *vctx, pcilib_irq_type_t irq_type, pcilib_irq_source_t irq_source) {
	104	uint32_t val;
	105
	106	nwl_dma_t ctx = (nwl_dma_t)vctx;
236 by Suren A. Chilingaryan Big redign of model structures	107	pcilib_nwl_engine_context_t *ectx = ctx->engines + irq_source;
88 by Suren A. Chilingaryan IRQ acknowledgement support in the engine API	108
	109	if (irq_type != PCILIB_DMA_IRQ) return PCILIB_ERROR_NOTSUPPORTED;
236 by Suren A. Chilingaryan Big redign of model structures	110	if (irq_source >= ctx->dmactx.pcilib->num_engines) return PCILIB_ERROR_NOTAVAILABLE;
88 by Suren A. Chilingaryan IRQ acknowledgement support in the engine API	111
236 by Suren A. Chilingaryan Big redign of model structures	112	nwl_read_register(val, ctx, ectx->base_addr, REG_DMA_ENG_CTRL_STATUS);
88 by Suren A. Chilingaryan IRQ acknowledgement support in the engine API	113	if (val & DMA_ENG_INT_ACTIVE_MASK) {
	114	val \|= DMA_ENG_ALLINT_MASK;
236 by Suren A. Chilingaryan Big redign of model structures	115	nwl_write_register(val, ctx, ectx->base_addr, REG_DMA_ENG_CTRL_STATUS);
88 by Suren A. Chilingaryan IRQ acknowledgement support in the engine API	116	}
	117
	118	return 0;
	119	}