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* This is a full rewrite of the pciDriver.
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* New default is to support kernel 2.6, using kernel 2.6 APIs.
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* This header defines the interface to the outside world.
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* $Date: 2008-01-24 14:21:36 $
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* $Log: not supported by cvs2svn $
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* Revision 1.5 2008-01-11 10:15:14 marcus
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* Removed unused interrupt code.
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* Added intSource to the wait interrupt call.
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* Revision 1.4 2006/11/17 18:44:42 marcus
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* Type of SG list can now be selected at runtime. Added type to sglist.
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* Revision 1.3 2006/11/17 16:23:02 marcus
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* Added slot number to the PCI info IOctl.
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* Revision 1.2 2006/11/13 12:29:09 marcus
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* Added a IOctl call, to confiure the interrupt response. (testing pending).
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* Basic interrupts are now supported.
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* Revision 1.1 2006/10/10 14:46:52 marcus
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* Initial commit of the new pciDriver for kernel 2.6
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* Revision 1.7 2006/10/06 15:18:06 marcus
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* Updated PCI info and PCI cmd
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* Revision 1.6 2006/09/25 16:51:07 marcus
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* Added PCI config IOctls, and implemented basic mmap functions.
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* Revision 1.5 2006/09/18 17:13:12 marcus
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* Revision 1.4 2006/09/15 15:44:41 marcus
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* Revision 1.3 2006/08/15 11:40:02 marcus
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* Revision 1.2 2006/08/12 18:28:42 marcus
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* Sync with the laptop
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* Revision 1.1 2006/08/11 15:30:46 marcus
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* Sync with the laptop
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#include <linux/ioctl.h>
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#include "../pcilib_types.h"
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/* Identifies the PCI-E Xilinx ML605 */
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#define PCIE_XILINX_VENDOR_ID 0x10ee
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#define PCIE_ML605_DEVICE_ID 0x6024
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/* Identifies the PCI-E IPE Camera */
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#define PCIE_IPECAMERA_DEVICE_ID 0x6081
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#define PCIE_KAPTURE_DEVICE_ID 0x6028
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//#define PCIE_IPECAMERA_DEVICE_ID 0x6018
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/* Possible values for ioctl commands */
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#define PCIDRIVER_BAR0 0
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#define PCIDRIVER_BAR1 1
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#define PCIDRIVER_BAR2 2
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#define PCIDRIVER_BAR3 3
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#define PCIDRIVER_BAR4 4
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#define PCIDRIVER_BAR5 5
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/* mmap mode of the device */
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#define PCIDRIVER_MMAP_PCI 0
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#define PCIDRIVER_MMAP_KMEM 1
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/* Direction of a DMA operation */
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#define PCIDRIVER_DMA_BIDIRECTIONAL 0
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#define PCIDRIVER_DMA_TODEVICE PCILIB_KMEM_SYNC_TODEVICE
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#define PCIDRIVER_DMA_FROMDEVICE PCILIB_KMEM_SYNC_FROMDEVICE
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/* Possible sizes in a PCI command */
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#define PCIDRIVER_PCI_CFG_SZ_BYTE 1
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#define PCIDRIVER_PCI_CFG_SZ_WORD 2
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#define PCIDRIVER_PCI_CFG_SZ_DWORD 3
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/* Possible types of SG lists */
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#define PCIDRIVER_SG_NONMERGED 0
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#define PCIDRIVER_SG_MERGED 1
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/* Maximum number of interrupt sources */
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#define PCIDRIVER_INT_MAXSOURCES 16
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#define KMEM_FLAG_REUSE 1 /**< Try to reuse existing buffer with the same use & item */
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#define KMEM_FLAG_EXCLUSIVE 2 /**< Allow only a single application accessing a specified use & item */
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#define KMEM_FLAG_PERSISTENT 4 /**< Sets persistent mode */
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#define KMEM_FLAG_HW 8 /**< The buffer may be accessed by hardware, the hardware access will not occur any more if passed to _free function */
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#define KMEM_FLAG_FORCE 16 /**< Force memory cleanup even if references are present */
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#define KMEM_FLAG_MASS 32 /**< Apply to all buffers of selected use */
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#define KMEM_FLAG_TRY 64 /**< Do not allocate buffers, try to reuse and fail if not possible */
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#define KMEM_FLAG_REUSED 1 /**< Indicates if buffer with specified use & item was already allocated and reused */
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#define KMEM_FLAG_REUSED_PERSISTENT 4 /**< Indicates that reused buffer was persistent before the call */
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#define KMEM_FLAG_REUSED_HW 8 /**< Indicates that reused buffer had a HW reference before the call */
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kmem_handle_t handle;
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unsigned long timeout; // microseconds
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unsigned int dword; /* not strict C, but if not can have problems */
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unsigned short vendor_id;
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unsigned short device_id;
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unsigned short devfn;
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unsigned char interrupt_pin;
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unsigned char interrupt_line;
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unsigned long bar_start[6];
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unsigned long bar_length[6];
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unsigned long bar_flags[6];
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} pcilib_board_info_t;
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/* ioctl interface */
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/* See documentation for a detailed usage explanation */
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* one of the problems of ioctl, is that requires a type definition.
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* This type is only 8-bits wide, and half-documented in
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* <linux-src>/Documentation/ioctl-number.txt.
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* previous SHL -> 'S' definition, conflicts with several devices,
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* so I changed it to be pci -> 'p', in the range 0xA0-AF
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#define PCIDRIVER_IOC_MAGIC 'p'
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#define PCIDRIVER_IOC_BASE 0xA0
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#define PCIDRIVER_IOC_MMAP_MODE _IO( PCIDRIVER_IOC_MAGIC, PCIDRIVER_IOC_BASE + 0 )
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#define PCIDRIVER_IOC_MMAP_AREA _IO( PCIDRIVER_IOC_MAGIC, PCIDRIVER_IOC_BASE + 1 )
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#define PCIDRIVER_IOC_KMEM_ALLOC _IOWR( PCIDRIVER_IOC_MAGIC, PCIDRIVER_IOC_BASE + 2, kmem_handle_t * )
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#define PCIDRIVER_IOC_KMEM_FREE _IOW ( PCIDRIVER_IOC_MAGIC, PCIDRIVER_IOC_BASE + 3, kmem_handle_t * )
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#define PCIDRIVER_IOC_KMEM_SYNC _IOWR( PCIDRIVER_IOC_MAGIC, PCIDRIVER_IOC_BASE + 4, kmem_sync_t * )
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#define PCIDRIVER_IOC_UMEM_SGMAP _IOWR( PCIDRIVER_IOC_MAGIC, PCIDRIVER_IOC_BASE + 5, umem_handle_t * )
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#define PCIDRIVER_IOC_UMEM_SGUNMAP _IOW( PCIDRIVER_IOC_MAGIC, PCIDRIVER_IOC_BASE + 6, umem_handle_t * )
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#define PCIDRIVER_IOC_UMEM_SGGET _IOWR( PCIDRIVER_IOC_MAGIC, PCIDRIVER_IOC_BASE + 7, umem_sglist_t * )
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#define PCIDRIVER_IOC_UMEM_SYNC _IOW( PCIDRIVER_IOC_MAGIC, PCIDRIVER_IOC_BASE + 8, umem_handle_t * )
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#define PCIDRIVER_IOC_WAITI _IO( PCIDRIVER_IOC_MAGIC, PCIDRIVER_IOC_BASE + 9 )
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/* And now, the methods to access the PCI configuration area */
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#define PCIDRIVER_IOC_PCI_CFG_RD _IOWR( PCIDRIVER_IOC_MAGIC, PCIDRIVER_IOC_BASE + 10, pci_cfg_cmd * )
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#define PCIDRIVER_IOC_PCI_CFG_WR _IOWR( PCIDRIVER_IOC_MAGIC, PCIDRIVER_IOC_BASE + 11, pci_cfg_cmd * )
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#define PCIDRIVER_IOC_PCI_INFO _IOWR( PCIDRIVER_IOC_MAGIC, PCIDRIVER_IOC_BASE + 12, pcilib_board_info_t * )
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/* Clear interrupt queues */
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#define PCIDRIVER_IOC_CLEAR_IOQ _IO( PCIDRIVER_IOC_MAGIC, PCIDRIVER_IOC_BASE + 13 )