#define REG_RESET_DMA                   0x00
#define REG_DMA                         0x04
#define REG_NUM_PACKETS_PER_DESCRIPTOR  0x10
#define REG_PERF_COUNTER		0x20
//#define REG_PERF_COUNTER                0x28
#define REG_PACKET_LENGTH               0x0C
#define REG_DESCRIPTOR_ADDRESS          0x50
#define REG_UPDATE_ADDRESS              0x58
#define REG_UPDATE_THRESHOLD            0x60
#define REG_UPDATE_COUNTER		0x70

#define REG_INTERCONNECT		0x9048
#define REG_COUNTER                     0x9000


#define DESCRIPTOR_OFFSET		256

#define WR32(addr, value) *(volatile uint32_t *) (((char*)(bar)) + (addr)) = (value);
#define RD32(addr) (*(volatile uint32_t *) (((char*)(bar)) + (addr)))
#define WR32_sleep(addr, value) *(volatile uint32_t *) (((char*)(bar)) + (addr)) = (value); usleep (100);

#define WR64(addr, value) *(volatile uint64_t *) (((char*)(bar)) + (addr)) = (value);
#define RD64(addr) (*(volatile uint64_t *) (((char*)(bar)) + (addr)))
#define WR64_sleep(addr, value) *(uint64_t *) (((char*)(bar)) + (addr)) = (value); usleep (100);